Cadence Allegro and OrCAD 17.20.000-2016 (x64) HF048

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Cadence Allegro and OrCAD 17.20.000-2016 (x64) HF048
Cadence Allegro and OrCAD 17.20.000-2016 HF048 | 3.5 Gb

Cadence Design Systems, Inc. has released an update (HF048) to OrCAD Capture, PSpice Designer and PCB Designer 17.20.000-2016. This latest release reduces PCB development time by addressing the need to design reliable circuits for smaller, more compact devices.

CCRID Product ProductLevel2 Title
1913039 ADW ADWSERVER EDM Library Server exits with error message on starting library server service
1709155 ADW COMPONENT_BRO Search query does not search for all the parts in the library
1827231 ADW COMPONENT_BRO Clicking the 'a' key in Part Manager launched from DE-HDL crashes DE-HDL
1903818 ADW COMPONENT_BRO Parts that have comment_body do not display version
1917961 ADW COMPONENT_BRO Component Browser PPL column values are truncated when selecting the top '*' filter
1938172 ADW COMPONENT_BRO Symbol version with COMMENT_BODY set to TRUE cannot be instantiated
1914103 ADW CONF conf creates incorrect path in fetch_dump.ini when MLR is enabled.
1911422 ADW DBADMIN RuleP101 - PACK_TYPE check against schematic model not working
1926691 ADW DBEDITOR Adding a new classification and immediately trying to delete it results in errors
1926694 ADW DBEDITOR Renaming a classification and then renaming it back to the original results in error
1934870 ADW DBEDITOR Adding a new classification and immediately trying to delete it results in errors
1872387 ADW DSN_MIGRATION Design Migration does not cache all used parts into flatlib/part_table.ptf
1254292 ADW FLOW_MGR Flow Manager Open Last Project should open last project closed
1281817 ADW FLOW_MGR '-proj' switch in 'pcbdw_fm' does not work; launches Flow Manager without loading any project
1727286 ADW FLOW_MGR Product options for PCB SI and Power Integrity are incorrect in the flow and tool launchers
1875498 ADW FLOW_MGR EDM fails to open or becomes unresponsive.
1879386 ADW FLOW_MGR Unable to access COS with the default Firefox version in the 17.2 installation
1922541 ADW FLOW_MGR Warning message for unavailability of Java version appears on opening a project on Linux
1945451 ADW FLOW_MGR Checklist does not work with two-byte characters
1956213 ADW FLOW_MGR Not able to invoke Flow Manager on the remote system
1892285 ADW LIBDISTRIBUTI Symbol not consistently available in 16.6 ADW Library
1961731 ADW LIBIMPORT libimport fails to create tar for two Capture models
1836620 ADW LRM Library Revision Manager crashes on clicking Help
1961845 ADW PART_BROWSER Error regarding environment variable
1890782 ADW TDA Launching TDO dashboard connected to PLM returns a license error
1980914 ADW TDA Cannot start Design Entry HDL and Component Browser in a TDO design
1833750 ALLEGRO_EDITOR 3D_CANVAS Soldermask Text is not shown in 3D Canvas
1891230 ALLEGRO_EDITOR 3D_CANVAS 3D Canvas Viewer not bending PCB with proper radius
1913338 ALLEGRO_EDITOR 3D_CANVAS STEP models missing from exported .stp file
1927507 ALLEGRO_EDITOR 3D_CANVAS Get Error: All bend operations are disabled due to licensing and/or DLL installation issues on invoking 3D Canvas
1931508 ALLEGRO_EDITOR 3D_CANVAS Place Bound Bottom is displayed on Top, when dra is opened in 3D Canvas
1943060 ALLEGRO_EDITOR 3D_CANVAS Placebound bottom is not showing correctly.
1950099 ALLEGRO_EDITOR 3D_CANVAS Place Bound Bottom is displayed on Top, when dra is opened in 3D Canvas
1988307 ALLEGRO_EDITOR 3D_CANVAS 3D Canvas error: All bend operations are disabled due to licensing and/or DLL installation
1923585 ALLEGRO_EDITOR ARTWORK Additional unwanted subclasses appear in film control when a new film definition is added
1944079 ALLEGRO_EDITOR COLOR Export of Board Parameters (Net Colors) does not contain entries for nets with spaces
1856320 ALLEGRO_EDITOR DATABASE Donut pad fails to connect with cross-hatched shape in full contact thermal mode, despite hatch overlap of donut.
1912313 ALLEGRO_EDITOR DATABASE Database corrupted during background process
1913344 ALLEGRO_EDITOR DATABASE When changing accuracy of design, the thermal relief for donut pad's outer pad connects to inner pad
1914470 ALLEGRO_EDITOR DATABASE Release 17.2-2016: export libraries command does not inherit posi/nega information
1932086 ALLEGRO_EDITOR DATABASE Unable to resolve DBDoctor error
1963932 ALLEGRO_EDITOR DATABASE DB Doctor is not recognizing placed parts and showing them as unplaced.
1987735 ALLEGRO_EDITOR DATABASE Interior sub-lamination backdrill holes are displayed with Top Soldermask pads where backdrill does not exist
1977622 ALLEGRO_EDITOR DFM Not able to add value '5' or multiples of 5 in in DFF constraints for maximum stacked via count
1894765 ALLEGRO_EDITOR DRC_CONSTR DRC for no_drc_component_board_overlap is not created if the place bound is outside Place Keepin
1896627 ALLEGRO_EDITOR DRC_CONSTR Moving components takes long time while doing placement
1914591 ALLEGRO_EDITOR DRC_CONSTR Spacing constraints for Mechanical to Hole shows resolved constraints different from the actual air-gap/space
1956468 ALLEGRO_EDITOR DRC_CONSTR DRC getting generated while moving the uvia and getting removed after updating DRC.
1884149 ALLEGRO_EDITOR EDIT_ETCH Arced Routing of differential pair creates unexpected arc radii
1891985 ALLEGRO_EDITOR EDIT_ETCH Etch edit does not follow the constraints
1860056 ALLEGRO_EDITOR GRAPHICS PCB Editor crashes on right-click after choosing the Move command
1860723 ALLEGRO_EDITOR GRAPHICS APD crashes on right-click when using the Move command
1870058 ALLEGRO_EDITOR GRAPHICS PCB Editor crashes when using Place Manual -H command
1930282 ALLEGRO_EDITOR GRAPHICS PCB Editor crashes on executing axlVisibleDesign(nil) from allegro.ilinit
1882813 ALLEGRO_EDITOR INTERACTIV Unable to set the end point with 'snap pick to' when adding an arc
1884725 ALLEGRO_EDITOR INTERACTIV Edit and Move vertex operation not working as desired
1902359 ALLEGRO_EDITOR INTERACTIV Connector boundary remains ON for a layer if visibility toggles in Shape Edit application mode
1909004 ALLEGRO_EDITOR INTERACTIV Parameter description showing wrong for Padless Holes under Design Parameter Editor
1912055 ALLEGRO_EDITOR INTERACTIV PCB Editor crashes on Delete By Query - AutoSilkscreen - Find By Query
1924503 ALLEGRO_EDITOR INTERACTIV Editing shape causes PCB Editor to crash
1929614 ALLEGRO_EDITOR INTERACTIV Unable to Place Via Array when Staggered ring is selected in Global Ring Parameters.
1938523 ALLEGRO_EDITOR INTERACTIV Change Shape Type message is same for dynamic and static shapes
1940827 ALLEGRO_EDITOR INTERACTIV Irrelevant/incorrect warning message when doing Edit- Change on Clines
1872653 ALLEGRO_EDITOR INTERFACES DXF export shows embedded layers in the layer configuration file
1873971 ALLEGRO_EDITOR INTERFACES IDX proposal comments are not shown when importing the IDX file into Allegro
1892172 ALLEGRO_EDITOR INTERFACES STEP Package Mapping form needs to be larger
1893311 ALLEGRO_EDITOR INTERFACES A line became two lines after import dxf
1937816 ALLEGRO_EDITOR INTERFACES Unit as % in Property Definition not supported by SubDrawing
1973084 ALLEGRO_EDITOR INTERFACES Physical library not placed if design and IDF database not matched while running
1987526 ALLEGRO_EDITOR INTERFACES IDX import Fails to recognize SURFACE FINISHES Class
1872856 ALLEGRO_EDITOR IN_DESIGN_ANA Message displayed when creating directed groups needs to be improved
1900832 ALLEGRO_EDITOR IN_DESIGN_ANA RTP: Return Path DRC does not check circle void correctly
1935641 ALLEGRO_EDITOR IN_DESIGN_ANA Return path DRC crashes PCB Editor
1649465 ALLEGRO_EDITOR MANUFACT Manufacturing options are not visible in OrCAD PCB Designer legacy menu
1873417 ALLEGRO_EDITOR MANUFACT Autosilk fails to add line information. Only part of the line is getting copied to the autosilk layer.
1911596 ALLEGRO_EDITOR MANUFACT Documentation Editor drill chart shows two different rows for the same slot.
1937721 ALLEGRO_EDITOR MANUFACT Drill figure character scaled up in GERBER
1957768 ALLEGRO_EDITOR MANUFACT Import IPC2581 on cross-section does not import line width and impedance
1969363 ALLEGRO_EDITOR MANUFACT Pressfit connector backdrill depth is considering MNC Layer
1891102 ALLEGRO_EDITOR MULTI_USER Rejected by server error messages when using Symphony Team Design
1928082 ALLEGRO_EDITOR MULTI_USER Unknown SubClass BOUNDARY/MULTI_USER_LOCK automatically added when defining Artwork Output.
1976705 ALLEGRO_EDITOR MULTI_USER Symphony client disconnects from server without any notification - despite ping mechanism
1972554 ALLEGRO_EDITOR NC Mill symbol moved from Nclegend-slots-1-2 to Nclegend-1-2 subclass if nc_param.txt not present
1914412 ALLEGRO_EDITOR OTHER Autosilk lines do not clear padstacks that are not rectangular
1921933 ALLEGRO_EDITOR PAD_EDITOR column clearance cannot reset to 0 in padstack editor
1922234 ALLEGRO_EDITOR PAD_EDITOR DBDoctor reports 'illegal value for pad' and does not fix when zero corner radius for Rounded Rectangle is defined
1932183 ALLEGRO_EDITOR PAD_EDITOR Drill Symbol information not exported in Padstack XML if Drill Figure in none
1934880 ALLEGRO_EDITOR PAD_EDITOR Shapes with offsets not displaying properly in Padstack Editor views
1813270 ALLEGRO_EDITOR PLACEMENT When a place replicate module is updated, the vias used in thermal pad are removed
1840275 ALLEGRO_EDITOR PLACEMENT Placing component with the Mirror option causing display problems
1854099 ALLEGRO_EDITOR PLACEMENT Align components to zero spacing causing mirrored components to overlap
1854696 ALLEGRO_EDITOR PLACEMENT Pins shown incorrectly when the Alt Symbol and Mirror commands used consecutively
1862863 ALLEGRO_EDITOR PLACEMENT Too many messages in the command window when symbol does not support mirroring
1909857 ALLEGRO_EDITOR PLACEMENT Using Mirror with Alt Symbol placement displays incorrect graphics
1917128 ALLEGRO_EDITOR PLACEMENT Place - Autoplace - Room when all the components of the room are placed on board causing crash
1925144 ALLEGRO_EDITOR PLACEMENT PCB Editor stops responding on using the Autoplace - Room command
1961509 ALLEGRO_EDITOR PLACEMENT PCB Editor crashes on choosing Place - Autoplace -Room
1930669 ALLEGRO_EDITOR REPORTS Net 'VSS' not included in the Etch Length By Pin Pair Report
1982934 ALLEGRO_EDITOR SCRIPTS PCB Editor stops responding if Generate button is used to create script from journal file
1337346 ALLEGRO_EDITOR SHAPE Shape Check is generating problem point errors that seem unnecessary
1396692 ALLEGRO_EDITOR SHAPE Zcopy with expansion not following board outline
1902001 ALLEGRO_EDITOR SHAPE Shape behaving differently across hotfixes
1921287 ALLEGRO_EDITOR SHAPE 3D canvas is showing some stray objects
1936482 ALLEGRO_EDITOR SHAPE Option for Fillet to not obey NO_SHAPE_CONNECT Property
1943899 ALLEGRO_EDITOR SHAPE Only one Shape to Route Keep In DRC in release 17.2-2016 compared to two in release 16.6
1944041 ALLEGRO_EDITOR SHAPE shape_rki_autoclip makes shape voiding incorrect
1947675 ALLEGRO_EDITOR SHAPE Shape void error when dv_squarecorners is enabled
1949250 ALLEGRO_EDITOR SHAPE Shapes are filled even after raising and lowering priority
1984526 ALLEGRO_EDITOR SHAPE Same net shape voided is inconsistent with respect to vias
1984955 ALLEGRO_EDITOR SHAPE Dynamic shape creating same net spacing drcs.
1839147 ALLEGRO_EDITOR SKILL axlDBGetLength() reports that the segments of a filled rectangle shape are invalid database ID arguments
1882776 ALLEGRO_EDITOR SKILL SKILL documentation for axlIsBetween() is wrong
1882882 ALLEGRO_EDITOR SKILL Example for axlMathConstants needs correction in Allegro SKILL Reference
1902712 ALLEGRO_EDITOR SKILL axlAltSymbolReplace moves symbol to the top of design while replacing
1906329 ALLEGRO_EDITOR SYMBOL Mechanical Pin to Conductor property set on a pin in a symbol does not pass to the board
1911343 ALLEGRO_EDITOR UI_FORMS Global Visibility not turning all layers off
1985584 ALLEGRO_EDITOR UI_FORMS Import logic changes the Current Working Directory
1987829 ALLEGRO_EDITOR UI_FORMS Import logic changes the current working directory
1992722 ALLEGRO_EDITOR UI_FORMS After netlist import process, the board file is changing its current path
1697506 ALLEGRO_EDITOR UI_GENERAL Stroke Editor working in OrCAD PCB Editor of release 16.6 does not work in release 17.2-2016
1702631 ALLEGRO_EDITOR UI_GENERAL Etch Length by Net report does not list correct net name for nets in a bus
1703105 ALLEGRO_EDITOR UI_GENERAL Bus net names are incorrect in reports when using the allegro_html_qt variable
1770786 ALLEGRO_EDITOR UI_GENERAL Stroke Editor working in OrCAD PCB Editor of release 16.6 does not work in release 17.2-2016
1784938 ALLEGRO_EDITOR UI_GENERAL Etch Length by Net report does not show net names with angle brackets in release 17.2-2016
1822557 ALLEGRO_EDITOR UI_GENERAL axlUIWCloseAll is not closing text window in release 17.2-2016
1836400 ALLEGRO_EDITOR UI_GENERAL Net names are truncated in HTML reports
1869879 ALLEGRO_EDITOR UI_GENERAL Links not working in the Net loop report
1895878 ALLEGRO_EDITOR UI_GENERAL axlUIWClose()/axlUIWCloseAll() functions do not work when allegro_html_qt setting is enabled.
1912282 ALLEGRO_EDITOR UI_GENERAL PCB Editor exits with error message on editing objects
1913962 ALLEGRO_EDITOR UI_GENERAL PCB Editor toolbars change on choosing View - UI Settings - Save Settings and then restarting
1933172 APD UI_GENERAL Cannot paste text into the command prompt without clicking when 'enable_command_window_history' is set
1843712 CAPTURE NETGROUPS Signals shown only for first segment of NetGroup
1917768 CAPTURE NEW_SYM_EDITO Missing package pin overview in Symbol editor
1920088 CAPTURE NEW_SYM_EDITO Package view missing in the new Symbol Editor
1922196 CAPTURE NEW_SYM_EDITO Snap to grid issue in Symbol editor
1927268 CAPTURE NEW_SYM_EDITO View Package is grayed out in release 17.2-2016, hotfix 038 and later versions
1928012 CAPTURE NEW_SYM_EDITO In new Symbol Editor, View - Package is grayed out
1930865 CAPTURE NEW_SYM_EDITO View Package missing in hotfix 038
1938507 CAPTURE NEW_SYM_EDITO Issues with new Symbol Editor: Justification and spreadsheet usability
1940869 CAPTURE NEW_SYM_EDITO Missing pins in 'Edit Pins of All Section' table view for 4k resolution but not in 2k resolution
1940888 CAPTURE NEW_SYM_EDITO Copying pins from a part and pasting on different parts not working properly.
1942994 CAPTURE NEW_SYM_EDITO Cut / Paste of object in New Part / Symbol editor always pastes on grid
1944396 CAPTURE NEW_SYM_EDITO javascript error while copying from 'Edit Pins of All Sections'
1950224 CAPTURE NEW_SYM_EDITO Cyrillic alphabets are not displayed properly on Schematic.
1951369 CAPTURE NEW_SYM_EDITO Cancel closes Symbol Editor
1966785 CAPTURE NEW_SYM_EDITO Edit Part is grayed out
1973135 CAPTURE NEW_SYM_EDITO Issue with new Symbol Editor: cannot copy-paste pins
1973344 CAPTURE NEW_SYM_EDITO javascript error on opening part from design
1974122 CAPTURE NEW_SYM_EDITO Cannot copy-paste all pin list on the new Symbol Editor
1983593 CAPTURE NEW_SYM_EDITO Script error on copying and pasting to property sheet
1929692 CAPTURE OPTIONS PACK_SHORT issues with Pin Numbers that contain letters/alphabets
1876939 CAPTURE OTHER Incorrect Capture renaming error (ORCAP-1310)
1916090 CAPTURE OTHER Incorrect error message when 'save as' fails due to long directory path
1921927 CAPTURE OTHER Two functions are mapped to Shift + R in OrCAD Capture in hotfix 038
1946453 CAPTURE OTHER Shift+R shortcut is assigned to two functions.
1965456 CAPTURE OTHER Shortcut Shift + R is not opening the Independent Sources dialog box
1968757 CAPTURE OTHER Close CIP is grayed when right-clicking on the tab in Capture.
1938437 CAPTURE PART_EDITOR OrCAD Capture new Symbol Editor Pin Type missing in table
1906757 CAPTURE SCHEMATICS Intersheet reference is overlapping with the offpage connector name
1867016 CAPTURE SCHEMATIC_EDI Part placeholders not being positioned when moved
1932837 CAPTURE SCHEMATIC_EDI Parameters graphics are not correctly positioned
1949518 CAPTURE SCHEMATIC_EDI Getting error when comparing designs
1967545 CAPTURE SCHEMATIC_EDI Only section A of heterogeneous part being placed and not sections B, C, or D
1933919 CIS DBC_CFG_WIZAR New CIS Configuration .dbc file created in release 17.2-2016 shows release 16.3
1932550 CIS RELATIONAL_DB VIEW NAME in Relational Database configuration is not working as expected.
1832524 CONCEPT_HDL CHECKPLUS Default checkplus rules show body height of 0 (sym_2 of the attached cell). This causes the cell to fail verification.
1912023 CONCEPT_HDL CHECKPLUS signalWidth predicate does not recognize SIG[1..0] as bus.
1966120 CONCEPT_HDL COPY_PROJECT Copying release 17.2-2016 project results in message stating the project is of an older version
1879425 CONCEPT_HDL CORE Adding signals with the right-click menu is not following the defined color scheme
1890542 CONCEPT_HDL CORE Getting ERROR(SPCOCN-1911) when running export physical with backannotation
1907684 CONCEPT_HDL CORE Moving symbol makes canvas unresponsive for a long time
1920711 CONCEPT_HDL CORE Pin names changes when mirroring the swapped section.
1931421 CONCEPT_HDL CORE On Linux, 'cpmaccess -read' returns incorrect value
1931782 CONCEPT_HDL CORE Setting DONT_FORCE_ORIGIN_ONGRID to ON does not work for sig_name
1932433 CONCEPT_HDL CORE _movetogrid causes signal disconnection
1946993 CONCEPT_HDL CORE DE-HDL Part Manager fails to update parts on schematic if new KEY properties exist in PTF but not in schematic
1947029 CONCEPT_HDL CORE Design Entry HDL Font Support not working for signal rename
1962865 CONCEPT_HDL CORE Schematic symbol creation with '-' as pin name not packaging
1966805 CONCEPT_HDL CORE Issues with packaging design containing cells named with a leading underscore
1967760 CONCEPT_HDL CORE DE-HDL crashes on moving Net Group/Port in release 17.2-2016, hotfix 044
1968282 CONCEPT_HDL CORE DE-HDL Part Manager fails to update parts on schematic when new KEY properties exist in PTF and not in schematic
1972815 CONCEPT_HDL CORE Part Manager not updating missing key attributes from the ptf file by using 'Update instances' option
1887790 CONCEPT_HDL CREFER CRefer links not working in selected cpm file
1898535 CONCEPT_HDL INTERFACE_DES Global Navigation window does not reflect removal of a net on page2 that is part of a netgroup on page1
1888048 CONCEPT_HDL PDF Japanese characters are not output correctly to PDF on Linux.
1937505 CONCEPT_HDL PDF Missing intersection dot in schematic PDF
1942486 CONSTRAINT_MGR CONCEPT_HDL CM crashes when you save after importing a TCF file
1983743 CONSTRAINT_MGR CONCEPT_HDL Region Class-Class members are being duplicated in CM in the current session
1906573 CONSTRAINT_MGR ECS_APPLY Database corrupt and DBDoctor reports illegal database pointer error
1913805 CONSTRAINT_MGR OTHER Setting environmental variable CM_PARTIAL_DCF in release 17.2-2016 causing crash
1914813 CONSTRAINT_MGR OTHER C++ Runtime error and non-recoverable crash in class-class worksheet
1920142 CONSTRAINT_MGR OTHER Xnet names are not consistent in the design
1898549 CONSTRAINT_MGR SCHEM_FTB Importing netlist causing crash in release 17.2-2016, hotfix 036
1814851 CONSTRAINT_MGR UI_FORMS Field solver /DRC check running forever
1889862 CONSTRAINT_MGR UI_FORMS PCB Editor hangs while assigning net voltages in CM
1965470 CONSTRAINT_MGR UI_FORMS Constraint Manager GUI Issue in release 17.2-2016, hotfix 039: Font size small and rows/columns in shrink mode
1945406 ECW ADMINISTRATIO Tree view was not refreshed soon after changing the site permission.
1826848 ECW METRICS SPDWECW-551 and SPDWECW-553 should be warnings, not errors
1933373 ECW PROJECT_MANAG ecwbatch does not accept password and does not ignore invalid users
1921502 F2B PACKAGERXL Errors on running Export Physical:SPCOPK-1138 and SPCOPK-1149
1929846 F2B PACKAGERXL PackagerXL is still creating the pstcmbc.dat file on a release 16.6 design uprevved to release 17.2-2016
1953780 F2B PACKAGERXL Updated subdesign package information not updated on the top-level design in the reuse flow
1971738 F2B PACKAGERXL Deleting blank space from pstxnet.dat file crashing DE-HDL
1891002 INSTALLATION DOWNLOAD_MGR Issue with Download Manager (Change Preferences Option does not Work)
1972890 ORBITIO OTHER OrbitIO-APR failed to run if PCB design included
1954262 PCB_LIBRARIAN CORE Footprint model check in fails with verification checks failed error
1943656 PCB_LIBRARIAN GRAPHICAL_EDI Symbol Editor is blank if .ascii file is newer than .css file
1897887 PCB_LIBRARIAN SYMBOL_EDITOR New Symbol Editor: Inconsistent symbol results when adding vector pins in Part Developer
1898003 PCB_LIBRARIAN SYMBOL_EDITOR Issue with Page Border Symbol
1842007 PSPICE LIBRARIES Change required in swit_reg.lib
1906922 PSPICE LIBRARIES Mismatch in mapping of IC pins in model and PSpice template for analog device AD8138
1947586 PSPICE LIBRARIES Update the model AD8138/AD in ANLG_DEV.OLB
1748470 PSPICE MATLAB PSpice displays an error when sending current in co-simulation
1802455 PSPICE MATLAB Incorrect current direction for pins in SLPS flow
1852811 PSPICE MATLAB ORPSIM-2604 being reported in SLPS simulation
1858716 PSPICE MATLAB Co-Simulation fails if 'RC' is used as reference of resistor
1921641 PSPICE MODELEDITOR Model Editor in Client Server installation slow to invoke
1922160 PSPICE MODELING_APPS New Capture Associate Symbol GUI not reading libraries
1843698 PSPICE PROBE PSpice icons appear very small on a specific computer
1773841 PSPICE SIMULATOR orSimSetup64 crashes when running the simulation for attached design
1816316 PSPICE SIMULATOR Simulation stuck; however, the status bar is correctly updated during Pseudo Transient Analysis
1887119 SCM IMPORTS Cannot selectively update changes in VDD
1889362 SCM IMPORTS Cannot selectively update changes in Visual Design Differences
1958545 SCM SETUP Auto assign models does not work in SCM same way as in DE-HDL
1988841 SIG_EXPLORER INTERACTIV SigXplorer stops responding or crashes in hotfix 047 when a design is saved
1988943 SIG_EXPLORER INTERACTIV SigXplorer crashes on selecting Update Constraint Manager
1991375 SIG_EXPLORER INTERACTIV SigXplorer crashes when clicking Save
1993749 SIG_EXPLORER INTERACTIV SigXplorer crashes on saving topology
1969975 SIG_INTEGRITY GUI Model Browser edits model above the one that is selected
1953184 SIP_LAYOUT IMPORT_DATA Sub Drawing not saving dashed lines
1913864 SIP_LAYOUT ORBITIO_IF SiP Layout design import results in wrong die rotation
1880237 SIP_LAYOUT PADSTACK_EDIT Background Window comes to the forefront when closing the Padstack editor
1972560 SIP_LAYOUT STREAM_IF GDS Export fidelity issue: inverted arcs
1920317 SIP_LAYOUT THIEVING Thieving pattern does not allow for OOPS operation
1909075 SYSTEMSI DOC SystemSI PBA channel and circuit simulations do not respond if bit pattern is 1s or 0s
1916101 SYSTEMSI DOC Lack of stimulus in file causes Serial Link Analysis to become unresponsive
1919562 SYSTEMSI ENG_PBA SystemSI generates wrong timing bathtub curves in channel simulations for write and read
1964064 SYSTEMSI GUI_PBA Able to sweep AMI parameters in SSI-PBA
1971266 SYSTEMSI GUI_PBA MCP header shows only 49 ckt nodes instead of 52 for s52p S-parameter file
1885625 SYSTEMSI GUI_SLA Manage AMI + DLL from Setup Analysis Window
1924382 SYSTEMSI GUI_SLA Data Rate field in SystemSI Stimulus property form is confusing for PAM4 operation
1982341 SYSTEM_CAPTURE CANVAS_EDIT Signal rename does not maintain new signal name value
1976857 SYSTEM_CAPTURE CONSTRAINT_MA System Capture-CM Match Group Creation is not updating correctly
1929606 SYSTEM_CAPTURE DESIGN_CORRUP Opening design causes System Capture to crash
1914697 SYSTEM_CAPTURE DRC Overlapping component DRC does not work
1973467 SYSTEM_CAPTURE IMPORT_PCB System Capture Import Physical shows many component and physical differences on a design that is synced up
1962603 SYSTEM_CAPTURE NAVLINKS Ability to not underline hyperlinks for Navigation Link values
1967639 SYSTEM_CAPTURE PART_MANAGER Part Manager does not open in System Capture for part property value changes even after setting the cpm directive.
1964388 SYSTEM_CAPTURE SMART_PDF Some shapes are not visible in the smart PDF schematics
1976832 SYSTEM_CAPTURE TDO Rolling Back local lower-block requires check-out of higher-level packaged & variant views
1976844 SYSTEM_CAPTURE TDO CM - TDO check-out dependencies are broken
1976859 SYSTEM_CAPTURE TDO Variant Editor in System Capture -TDO allows to delete a variant without checking out variants view
1839816 TDA CORE All the design objects are locked in the EDM dashboard after a DSFrame error
1889898 TDA CORE Cannot check in the top level of the project in TDO
1892411 TDA CORE Unable to undo the block checkout if something fails
1877757 TDA DEHDL Refresh Hierarchy does not show latest TDO lock/unlock status in DE-HDL
About Allegro and OrCAD 17.2-2016. The OrCAD 17.2-2016 release introduced new capabilities for OrCAD Capture, PSpice Designer, and PCB Designer 17.2-2016 that address challenges with flex and rigid-flex design as well as mixed-signal simulation complexities in IoT, wearables, and wireless mobile devices. This latest release reduces PCB development time by addressing the need to design reliable circuits for smaller, more compact devices.
- OrCAD Flex and Rigid-Flex Technologies
To enable a faster and more efficient flex and rigid-flex design creation critical to IoT, wearables and wireless devices, the OrCAD 17.2-2016 portfolio enables several new capabilities for flex and rigid flex design to minimize design iterations. Key flex and rigid flex features include: Stack-up by zone for flex and rigid-flex designs, Inter-layer checks for rigid-flex designs, Contour and arc-aware routing.
- New Cross-Section Editor
In the OrCAD PCB Designer 17.2-2016 release, the Cross-Section Editor has been redesigned to leverage the underlying spreadsheet technology found in the Constraint Manager. It offers a one-stop shop for features that require the cross section for their setup, such as dynamic unused pad suppression and embedded component design. The Cross-Section Editor has been enhanced to support multiple stackups for rigid-flex design, each capable of supporting conductor and non-conductor layers such as Soldermask and Coverlay.
- New Padstack Editor
A new Padstack Editor has been introduced in OrCAD PCB Editor 17.2-2016 to ease padstack creation through a new modern user interface. In addition to supporting new pad geometries, drill types, additional attributes, and additional mask layers ability to define keep-outs within the padstack with complex geometries for all objects, the new capabilities allow PCB librarians to help PCB designers streamline the design process for complex padstacks, and also the commonly used padstacks.
- OrCAD PCB Designer 17.2-2016 Features
The OrCAD PCB Designer 17.2-2016 release also include new features or enhancements targeted towards improving PCB editors' productivity and ease-of-use. Other new features include: Via2via Line Fattening (HDI), Display Segments Over Voids, Layer Set Based Routing, Diff Pair Routing and DRC, Full Xnet Support, Gloss Commands, Contour Routing, and many more.
- OrCAD Capture Design Difference Viewer
The Graphical Design Difference Viewer is a powerful, real-time, design difference, visual review utility in OrCAD Capture with the ability to perform logical as well as graphical comparisons on a page-by-page basis. The Graphical Design Difference Viewer generates an interactive single-report HTML file that is platform and tool independent, a unique viewing feature to identify the differences leading to changes in circuit behavior as well as differences based on individual object level, thereby helping address the specialized needs of the users.
- Advanced Annotation
With the newly introduced Advanced Annotation feature supported by OrCAD Capture, users can assign reference ranges hierarchically by automatically assigning values and perform annotation on the whole design, on hierarchy block at any level, page and property block, giving them complete control over their component annotation process in the design cycle.
- PSpice Virtual Prototyping
The new virtual prototyping functionality introduced in PSpice helps electrical engineers overcome design challenges by automating the code generation for multi-level abstraction models written in C/C++ and SystemC. This functionality assists them in generating code requiring limited coding capabilities by design engineers and thereby making the process of virtual prototyping extremely convenient and easy.

Note: The ADW product line, individual ADW products, and product family names have been rebranded in release 17.2-2016. The Allegro Design Workbench (ADW) is now referred to as Allegro Engineering Data Management (EDM). For the full list of new and improved features, and fixed bugs please refer to the release notes located here

About Cadence. Cadence enables global electronic design innovation and plays an essential role in the creation of today's integrated circuits and electronics. Customers use Cadence software, hardware, IP and services to design and verify advanced semiconductors, consumer electronics, networking and telecommunications equipment, and computer systems. The company is headquartered in San Jose, Calif., with sales offices, design centers and research facilities around the world to serve the global electronics industry.

Product: Cadence Allegro and OrCAD (Including EDM)
Version: 17.20.000-2016 HF048
Supported Architectures: x64
Website Home Page :

Language: english
System Requirements: PC
Supported Operating Systems: ShiChuang 7even or newer / 2008 Server R2 / 2012 Server
System Requirements: Cadence Allegro and OrCAD (Including EDM) version 17.20.000-2016 and above
Size: 3.5 Gb




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Tags: Cadence, Allegro

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